Testwafers and Substrates
Test chips are extremely helpful for process development, e.g. for material screening, but also for training purposes. Since many years, ISIT develops test chips and produces them in an industrial semiconductor fab. For many chip geometries, matching substrates are equally available for assembly and interconnect trials by flip chip and wire bonding. Depending on the planned development, the test chips can be customised by individual modifications. For example, wafer thickness as well as dicing pitch and dicing foil can be defined. Test chips can also be equipped with solder bumps or just a chemical Ni-Au under-bump metallisation. Through a daisy-chain structure available on all test chips, the evaluation of process yield and reliability of most assembly technologies is possible.
Test chips are usually provided as entire 200 mm wafers on foil. Customer specific samples with specific geometries, even on glass wafers, can be developed on demand. Glass dies with a Vernier structure are particularly suitable for an accurate post-bond inspection of a die bonder's alignment precision and for optimising underfill processes.